Vertical power transistors such as vertical metal oxide semiconductor field effect transistor (“MOSFET”), vertical junction field effect transistor (“JFET”) or field effect transistor (“FET”) with integrated Schottky diode are widely used in power management applications. Some power management applications, for example, half-bridge drivers, synchronous buck converters, and synchronous boost converters, include vertical power transistors that are connected in series.
FIG. 1 illustrates a conventional switching power converter 100 comprising a low side power transistor 101, a high side power transistor 102 and a controller 103. The drain electrode 102D of the high side power transistor 102 is coupled to an input port to receive a power supply VIN. The gate electrode 102G of the high side power transistor 102 and the gate electrode 101G of the low side power transistor 101 are configured to receive gate control signals from the controller 103. The source electrode 102S of the high side power transistor 102 and the drain electrode 101D of the low side power transistor 101 are connected together to form a switching node SW which outputs switching signals. The source electrode 101S of the low side power transistor 101 is connected to ground GND.
In certain high power applications, the high side power transistor 102 and the low side power transistor 101 are implemented as vertical power transistors such as vertical MOSFETs. Vertical power transistors typically comprise a drain electrode on a back surface of the power transistor die, and source and gate electrodes on a top surface of the power transistor die. The high side power transistor 102, the low side power transistor 101 and the controller 103 are typically fabricated on separate semiconductor dies, which are laid on a lead frame structure 104 in the same plane. The drain electrode 102D of the high side power transistor 102 and the drain electrode 101D of the low side power transistor 101 are mounted to separate, isolated pieces of the lead frame structure 104, as illustrated in FIG. 2.
For high-power devices, the lead frame can be used as a heat sink. For ease of integration onto a printed circuit board (“PCB”), the heat sink is usually at ground potential. In the switching power converter 100 shown in FIG. 1 with the conventional packaging strategy shown in FIG. 2, the drain electrode 102D of the high side power transistor 102 and the drain electrode 101D of the low side power transistor 101, which are attached to the lead frame structure 104, are respectively coupled to a constant high voltage and a switching node which switches between high and low voltages. An exposed lead frame at a constant high voltage is less desirable because it adds a high-voltage heat sink area on the PCB. It is even more undesirable for the exposed lead frame to switch between high and low voltages, as the switching transients may cause electro magnetic interference (“EMI”). Also, the conventional packaging strategy as shown in FIG. 2 can result in a large package size because the dies are arranged side-by-side. Also, different semiconductor dies are interconnected by wirebonding, and thus may introduce parasitic resistance and inductance. Furthermore, the presence of multiple exposed lead frame pieces in close proximity to one another complicates the attachment of the co-packaged product to a PCB.